Results 1 - 10 of 559
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[en] A diagram is presented and the function described of the control element. The element consists of a two stage Darlington pair of PNP power transistors and a system of parallel-connected NPN power transistors connected to it. The cases of the NPN power transistors are connected to the heat sink directly without insulation pads. The heat sink is earthed. The reduction in thermal resistance of the case-heat sink transition considerably increases the cooling effect and increases the current carrying capacity of the transistors and their reliability. The required dynamic properties are guaranteed by excitation from a transistor with opposite polarity in common emitter connection. Because it is not power loaded it may be electrically insulated from the heat sink. (J.B.). 1 fig
[en] The Insertable B-layer (IBL) is a fourth pixel layer that will be added inside the existing ATLAS pixel detector during the long LHC shutdown of 2013 and 2014. The new four layer pixel system will ensure excellent tracking, vertexing and b-tagging performance in the high luminosity pile-up conditions projected for the next LHC run. The peak luminosity is expected to reach 3·1034 cm−2s−1with an integrated luminosity over the IBL lifetime of 300 fb−1 corresponding to a design lifetime fluence of 5·1015 neqcm−2 and ionizing dose of 250 Mrad including safety factors. The production front-end electronics FE-I4B for the IBL has been fabricated at the end of 2011 and has been extensively characterized on diced ICs as well as at the wafer level. The production tests at the wafer level were performed during 2012. Selected results of the diced IC characterization are presented, including measurements of the on-chip voltage regulators. The IBL powering scheme, which was chosen based on these results, is described. Preliminary wafer to wafer distributions as well as yield calculations are given.
[en] The original two-tube bouncer built by Haefely has been replaced by a single tube bouncer featuring a simpler and cheaper design, without compromising on the precision of the HV regulation. This paper describes the basic design and construction of the new system, putting special emphasis on reliability and ease of maintenance
[en] A full on-chip and area-efficient low-dropout linear regulator (LDO) is presented. By using the proposed adaptive frequency compensation (AFC) technique, full on-chip integration is achieved without compromising the LDO's stability in the full output current range. Meanwhile, the use of a compact pass transistor (the compact pass transistor serves as the gain fast roll-off output stage in the AFC technique) has enabled the LDO to be very area-efficient. The proposed LDO is implemented in standard 0.35 μm CMOS technology and occupies an active area as small as 220 x 320 μm2, which is a reduction to 58% compared to state-of-the-art designs using technologies with the same feature size. Measurement results show that the LDO can deliver 0-60 mA output current with 54 μA quiescent current consumption and the regulated output voltage is 1.8 V with an input voltage range from 2 to 3.3 V. (semiconductor integrated circuits)
[en] The effects of post fabrication annealing on the electrical characteristics of n-ZnO/p-Si heterostructure are studied. The nanorods of ZnO are grown by aqueous chemical growth (ACG) technique on p-Si substrate and ohmic contacts of Al/Pt and Al are made on ZnO and Si. The devices are annealed at 400 and 600 oC in air, oxygen and nitrogen ambient. The characteristics are studied by photoluminescence (PL), current-voltage (I-V) and capacitance - voltage (C-V) measurements. PL spectra indicated higher ultraviolet (UV) to visible emission ratio with a strong peak of near band edge emission (NBE) centered from 375-380 nm and very weak broad deep-level emissions (DLE) centered from 510-580 nm. All diodes show typical non linear rectifying behavior as characterized by I-V measurements. The results indicated that annealing in air and oxygen resulted in better electrical characteristics with a decrease in the reverse current. (author)
[en] This paper presents a low quiescent current, highly stable low-drop out (LDO) regulator. In order to reduce capacitor value and control frequency response peak, capacitor multipliers are adopted in the compensation circuit with mathematic calculations. The phase margin is adequate when the load current is 0.1 or 150 mA. Fabricated in an XFAB 0.6 μm CMOS process, the LDO produces 12.2 mV (0.7%) overshoot voltage while the current changes at 770 mA/100 μs with a capacitor load of 10 μF.
[en] The operational principles and basic circuits of the stable high-voltage supply unit with a sequential oscillating circuit are described. A voltage stabilizer and a voltage converter are the main elements of the unit. The high-voltage stabilizer is based on a μA100 operational amplifier which regulates the input voltage of the converter according to the output voltage variations. The output voltage is 5kV, current is 0,25 mA, voltage stabilization is not worse than 10-3. US integrated circuits or their USSR analogs are basically used in the unit