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Carroll, J.T.; Cittolin, S.; Demoulin, M.; Fucci, A.; Martin, B.; Norton, A.; Porte, J.P.; Rossi, P.; Storr, K.M.
Stanford Linear Accelerator Center, CA (USA); European Organization for Nuclear Research, Geneva (Switzerland)1983
Stanford Linear Accelerator Center, CA (USA); European Organization for Nuclear Research, Geneva (Switzerland)1983
AbstractAbstract
[en] Event sizes and data rates at the CERN anti p p collider compose a formidable environment for a high level trigger. A system using three 168/E processors for experiment UA1 real-time event selection is described. With 168/E data memory expanded to 512K bytes, each processor holds a complete event allowing a FORTRAN trigger algorithm access to data from the entire detector. A smart CAMAC interface reads five Remus branches in parallel transferring one word to the target processor every 0.5 μs. The NORD host computer can simultaneously read an accepted event from another processor
Original Title
CERN ISR
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Source
Mar 1983; 15 p; Meeting on the impact of specialized processors in elementary particle physics; Padova (Italy); 23-25 Mar 1983; CONF-830353--1; Available from NTIS, PC A02/MF A01 as DE83011514
Record Type
Report
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Conference
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