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Kim, W.S.; Mnich, T.M.; Corbett, W.T.; Treece, R.K.; Giddings, A.E.; Jorgensen, J.L.
Sandia National Labs., Albuquerque, NM (USA)1983
Sandia National Labs., Albuquerque, NM (USA)1983
AbstractAbstract
[en] A microprocessor family has been designed in radiation-hardened bulk, silicon-gate CMOS and the three main family members are logic emulations of Intel NMOS devices: SA3000, a general-purpose 8-bit central processing unit (CPU) (Intel 8085A); SA3001, a 256 x 8-bit static RAM with two 8-bit I/O ports, one 6-bit I/O port and a timer (Intel 8155/56); SA3002, a 2K x 8-bit ROM with two 8-bit I/O ports (Intel 8355). This paper describes the design principles and methodology used to realize fully static, fully complementary CMOS devices capable of withstanding more than one megarad total dose. These designs are latchup-free and are built on epitaxial substrates using a 3-micron gate length technology. In order to achieve this level of radiation tolerance, the radiation characteristics of the process must be measured and the radiation effects accommodated in all phases of the design
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1983; 13 p; 20. IEEE annual conference on nuclear and space radiation effects; Gatlinburg, TN (USA); 18-21 Jul 1983; CONF-830714--10; Available from NTIS, PC A02/MF A01 as DE83015112
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