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Dressendorfer, P.V.; Winokur, P.S.; Schwank, J.R.; McWhorter, P.J.; Errett, E.B.; Sexton, F.W.; Fleetwood, D.M.; McBrayer, J.D.
Sandia National Labs., Albuquerque, NM (USA)1985
Sandia National Labs., Albuquerque, NM (USA)1985
AbstractAbstract
[en] This paper briefly discusses some of the techniques developed to separate bulk oxide trapped charge from interface trapped charge in MOS devices, and then illustrates how these techniques may be used to engineer the Si/SiO2 interface to reduce charge trapping and trap generation by altering various processes used in the manufacture of integrated circuits. The process techniques which result in improved hardness are then shown to also result in reduced degradation from hot carrier effects
Source
1985; 6 p; Symposium on VLSI technology; Kobe (Japan); 14 May 1985; CONF-850580--1; Available from NTIS, PC A02/MF A01 as DE85005493
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