[en] The High Luminosity LHC (HL-LHC) will deliver a luminosity of up to 5 × 10"3"4cm"−"2s"−"1, with an average of about 140 overlapping proton-proton collisions per bunch crossing. These extreme pileup conditions place stringent requirements on the trigger system to be able to cope with the resulting event rates. A key component of the CMS upgrade for HL-LHC is a track trigger system, able to identify tracks with transverse momenta above 2 GeV/c already at the first-level trigger. We present here the status of the implementation of a prototype system, based on the combination of Associative Memory custom ASIC and modern Field Programmable Gate Array (FPGA) devices, with the purpose to demonstrate the concept based on state-of-the-art technologies, and to direct the efforts of the necessary R&D toward a final system